Catálogo de publicaciones - libros
Computer Aided Verification: 17th International Conference, CAV 2005, Edinburgh, Scotland, UK, July 6-10, 2005, Proceedings
Kousha Etessami ; Sriram K. Rajamani (eds.)
En conferencia: 17º International Conference on Computer Aided Verification (CAV) . Edinburgh, United Kingdom . July 6, 2005 - July 10, 2005
Resumen/Descripción – provisto por la editorial
No disponible.
Palabras clave – provistas por la editorial
Logics and Meanings of Programs; Software Engineering; Mathematical Logic and Formal Languages; Artificial Intelligence (incl. Robotics); Logic Design
Disponibilidad
Institución detectada | Año de publicación | Navegá | Descargá | Solicitá |
---|---|---|---|---|
No detectada | 2005 | SpringerLink |
Información
Tipo de recurso:
libros
ISBN impreso
978-3-540-27231-1
ISBN electrónico
978-3-540-31686-2
Editor responsable
Springer Nature
País de edición
Reino Unido
Fecha de publicación
2005
Información sobre derechos de publicación
© Springer-Verlag Berlin Heidelberg 2005
Tabla de contenidos
doi: 10.1007/11513988_1
Randomized Algorithms for Program Analysis and Verification
George C. Necula; Sumit Gulwani
Program analysis and verification are provably hard, and we have learned not to expect perfect results. We are accustomed to pay this cost in terms of incompleteness and algorithm complexity. Recently we have started to investigate what benefits we could expect if we are willing to trade off controlled amounts of soundness. This talk describes a number of randomized program analysis algorithms which are simpler, and in many cases have lower computational complexity, than the corresponding deterministic algorithms. The price paid is that such algorithms may, in rare occasions, infer properties that are not true. We describe both the intuitions and the technical arguments that allow us to evaluate and control the probability that an erroneous result is returned, in terms of various parameters of the algorithm. These arguments will also shed light on the limitations of such randomized algorithms.
- Invited Talks | Pp. 1-1
doi: 10.1007/11513988_2
Validating a Modern Microprocessor
Bob Bentley
The microprocessor presents one of the most challenging design problems known to modern engineering. The number of transistors in each new process generation continues to follow the growth curve outlined by Gordon Moore 40 years ago. Microarchitecture complexity has increased immeasurably since the introduction of out-of-order speculative execution designs in the mid-90s; and subsequent enhancements such as Hyper-Threading (HT) Technology, Extended Memory 64 Technology and ever-deeper pipelining indicate that there are no signs of a slowdown any time soon. Power has become a first-order concern thanks to a 20x increase in operating frequencies in the past decade and leakier transistors at smaller geometries, and the various schemes for managing and reducing power while retaining peak performance have added their own dimensions of complexity.
- Invited Talks | Pp. 2-4
doi: 10.1007/11513988_3
Algorithmic Algebraic Model Checking I: Challenges from Systems Biology
C. Piazza; M. Antoniotti; V. Mysore; A. Policriti; F. Winkler; B. Mishra
In this paper, we suggest a possible confluence of the theory of hybrid automata and the techniques of algorithmic algebra to create a computational basis for systems biology. We describe a method to compute bounded reachability by combining Taylor polynomials and cylindric algebraic decomposition algorithms. We discuss the power and limitations of the framework we propose and we suggest several possible extensions. We briefly show an application to the study of the Delta-Notch protein signaling system in biology.
- Invited Talks | Pp. 5-19
doi: 10.1007/11513988_4
SMT-COMP: Satisfiability Modulo Theories Competition
Clark Barrett; Leonardo de Moura; Aaron Stump
Decision procedures for checking satisfiability of logical formulas are crucial for many verification applications (e.g., [2,6,3]). Of particular recent interest are solvers for Satisfiability Modulo Theories (SMT). SMT solvers decide logical satisfiability (or dually, validity) with respect to a background theory in classical first-order logic with equality. Background theories useful for verification are supported, like equality and uninterpreted functions (EUF), real or integer arithmetic, and theories of bitvectors and arrays. Input formulas are often syntactically restricted; for example, to be quantifier-free or to involve only . Some solvers support a combination of theories, or quantifiers.
- Tools Competition | Pp. 20-23
doi: 10.1007/11513988_5
Predicate Abstraction via Symbolic Decision Procedures
Shuvendu K. Lahiri; Thomas Ball; Byron Cook
We present a new approach for performing predicate abstraction based on . A symbolic decision procedure for a theory () takes sets of predicates and and symbolically executes a decision procedure for on ′ ∪ {– | ∈ }, for all the subsets ′ of . The result of is a shared expression (represented by a directed acyclic graph) that implicitly represents the answer to a predicate abstraction query.
We present symbolic decision procedures for the logic of Equality and Uninterpreted Functions(EUF) and Difference logic (DIF) and show that these procedures run in pseudo-polynomial (rather than exponential) time. We then provide a method to construct ’s for simple mixed theories (including EUF + DIF) using an extension of the Nelson-Oppen combination method. We present preliminary evaluation of our procedure on predicate abstraction benchmarks from device driver verification in SLAM.
- Abstraction and Refinement | Pp. 24-38
doi: 10.1007/11513988_6
Interpolant-Based Transition Relation Approximation
Ranjit Jhala; K. L. McMillan
In predicate abstraction, exact image computation is problematic, requiring in the worst case an exponential number of calls to a decision procedure. For this reason, software model checkers typically use a weak approximation of the image. This can result in a failure to prove a property, even given an adequate set of predicates. We present an interpolant-based method for strengthening the abstract transition relation in case of such failures. This approach guarantees convergence given an adequate set of predicates, without requiring an exact image computation. We show empirically that the method converges more rapidly than an earlier method based on counterexample analysis.
- Abstraction and Refinement | Pp. 39-51
doi: 10.1007/11513988_7
Concrete Model Checking with Abstract Matching and Refinement
Corina S. Păsăreanu; Radek Pelánek; Willem Visser
We propose an abstraction-based model checking method which relies on refinement of an under-approximation of the feasible behaviors of the system under analysis. The method preserves errors to safety properties, since all analyzed behaviors are feasible by definition. The method does not require an abstract transition relation to be generated, but instead executes the concrete transitions while storing abstract versions of the concrete states, as specified by a set of abstraction predicates. For each explored transition the method checks, with the help of a theorem prover, whether there is any loss of precision introduced by abstraction. The results of these checks are used to decide termination or to refine the abstraction by generating new abstraction predicates. If the (possibly infinite) concrete system under analysis has a finite bisimulation quotient, then the method is guaranteed to eventually explore an equivalent finite bisimilar structure. We illustrate the application of the approach for checking concurrent programs. We also show how a lightweight variant can be used for efficient software testing.
- Abstraction and Refinement | Pp. 52-66
doi: 10.1007/11513988_8
Abstraction for Falsification
Thomas Ball; Orna Kupferman; Greta Yorsh
Abstraction is traditionally used in the process of . There, an abstraction of a concrete system is sound if properties of the abstract system also hold in the concrete system. Specifically, if an abstract state satisfies a property then the concrete states that correspond to satisfy too. Since the ideal goal of proving a system correct involves many obstacles, the primary use of formal methods nowadays is . There, as in , the goal is to detect errors, rather than to prove correctness. In the falsification setting, we can say that an abstraction is sound if errors of the abstract system exist also in the concrete system. Specifically, if an abstract state violates a property , then a concrete state that corresponds to and violates too.
An abstraction that is sound for falsification need not be sound for verification. This suggests that existing frameworks for abstraction for verification may be too restrictive when used for falsification, and that a new framework is needed in order to take advantage of the weaker definition of soundness in the falsification setting.
We present such a framework, show that it is indeed stronger (than other abstraction frameworks designed for verification), demonstrate that it can be made even stronger by parameterizing its transitions by predicates, and describe how it can be used for falsification of branching-time and linear-time temporal properties, as well as for generating testing goals for a concrete system by reasoning about its abstraction.
- Abstraction and Refinement | Pp. 67-81
doi: 10.1007/11513988_9
Bounded Model Checking of Concurrent Programs
Ishai Rabinovitz; Orna Grumberg
We propose a SAT-based bounded verification technique, called TCBMC, for threaded C programs. Our work is based on CBMC, which models sequential C programs in which the number of executions for each loop and the depth of recursion are bounded.
The novelty of our approach is in bounding the number of context switches allowed among threads. Thus, we obtain an efficient modeling that can be sent to a SAT solver for property checking. We also suggest a novel technique for modeling mutexes and Pthread conditions in concurrent programs. Using this bounded technique, we can detect bugs that invalidate safety properties. These include races and deadlocks, the detection for which is crucial for concurrent programs.
- Bounded Model Checking | Pp. 82-97
doi: 10.1007/11513988_10
Incremental and Complete Bounded Model Checking for Full PLTL
Keijo Heljanko; Tommi Junttila; Timo Latvala
Bounded model checking is an efficient method for finding bugs in system designs. The major drawback of the basic method is that it cannot prove properties, only disprove them. Recently, some progress has been made towards proving properties of LTL. We present an and bounded model checking method for the full linear temporal logic with past (PLTL). Compared to previous works, our method both improves and extends current results in many ways: (i) our encoding is incremental, resulting in improvements in performance, (ii) we can prove non-existence of a counterexample at shallower depths in many cases, and (iii) we support full PLTL. We have implemented our method in the NuSMV2 model checker and report encouraging experimental results.
- Bounded Model Checking | Pp. 98-111