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Computer Aided Verification: 19th International Conference, CAV 2007, Berlin, Germany, July 3-7, 2007. Proceedings

Werner Damm ; Holger Hermanns (eds.)

En conferencia: 19º International Conference on Computer Aided Verification (CAV) . Berlin, Germany . July 3, 2007 - July 7, 2007

Resumen/Descripción – provisto por la editorial

No disponible.

Palabras clave – provistas por la editorial

Theory of Computation; Logics and Meanings of Programs; Software Engineering; Mathematical Logic and Formal Languages; Artificial Intelligence (incl. Robotics); Logic Design

Disponibilidad
Institución detectada Año de publicación Navegá Descargá Solicitá
No detectada 2007 SpringerLink

Información

Tipo de recurso:

libros

ISBN impreso

978-3-540-73367-6

ISBN electrónico

978-3-540-73368-3

Editor responsable

Springer Nature

País de edición

Reino Unido

Fecha de publicación

Información sobre derechos de publicación

© Springer-Verlag Berlin Heidelberg 2007

Tabla de contenidos

Parallelising Symbolic State-Space Generators

Jonathan Ezekiel; Gerald Lüttgen; Gianfranco Ciardo

Symbolic state-space generators are notoriously hard to parallelise, largely due to the irregular nature of the task. Parallel languages such as Cilk, tailored to irregular problems, have been shown to offer efficient scheduling and load balancing. This paper explores whether Cilk can be used to efficiently parallelise a symbolic state-space generator on a shared-memory architecture. We parallelise the Saturation algorithm implemented in the SMART verification tool using Cilk, and compare it to a parallel implementation of the algorithm using a thread pool. Our experimental studies on a dual-processor, dual-core PC show that Cilk can improve the run-time efficiency of our parallel algorithm due to its load balancing and scheduling efficiency. We also demonstrate that this incurs a significant memory overhead due to Cilk’s inability to support pipelining, and conclude by pointing to a possible future direction for parallel irregular languages to include pipelining.

- Session IX: Parallelisation | Pp. 268-280

I/O Efficient Accepting Cycle Detection

Jiri Barnat; Lubos Brim; Pavel Šimeček

We show how to adapt an existing non-DFS-based accepting cycle detection algorithm OWCTY [10,15,29] to the I/O efficient setting and compare its I/O efficiency and practical performance to the existing I/O efficient LTL model checking approach of Edelkamp and Jabbar [14]. The new algorithm exhibits similar I/O complexity with respect to the size of the graph while it avoids quadratic increase in the size of the graph. Therefore, the number of I/O operations performed is significantly lower and the algorithm exhibits better practical performance.

- Session IX: Parallelisation | Pp. 281-293

C32SAT: Checking C Expressions

Robert Brummayer; Armin Biere

C32SAT is a tool for checking C expressions. It can check whether a given C expression can be satisfied, is tautological, or always defined according to the ISO C99 standard. C32SAT can be used to detect nonportable expressions where program behavior depends on the compiler. Our contribution consists of C32SAT’s functional representation and the way it handles undefined values. Under-approximation is used as optimization.

- Session X: Constraints and Decisions | Pp. 294-297

CVC3

Clark Barrett; Cesare Tinelli

CVC3, a joint project of NYU and U Iowa, is the new and latest version of the Cooperating Validity Checker. CVC3 extends and builds on the functionality of its predecessors and includes many new features such as support for additional theories, an abstract architecture for Boolean reasoning, and SMT-LIB compliance. We describe the system and discuss some applications and continuing work.

- Session X: Constraints and Decisions | Pp. 298-302

BAT: The Bit-Level Analysis Tool

Panagiotis Manolios; Sudarshan K. Srinivasan; Daron Vroon

While effective methods for bit-level verification of low-level properties exist, system-level properties that entail reasoning about a significant part of the design pose a major verification challenge. We present the Bit-level Analysis Tool (BAT), a state-of-the-art decision procedure for bit-level reasoning that implements a novel collection of techniques targeted towards enabling the verification of system-level properties. Key features of the BAT system are an expressive strongly-typed modeling and specification language, a fully automatic and efficient memory abstraction algorithm for extensional arrays, and a novel CNF generation algorithm. The BAT system can be used to automatically solve system-level RTL verification problems that were previously intractable, such as refinement-based verification of RTL-level pipelined machines.

- Session X: Constraints and Decisions | Pp. 303-306

LIRA: Handling Constraints of Linear Arithmetics over the Integers and the Reals

Bernd Becker; Christian Dax; Jochen Eisinger; Felix Klaedtke

The mechanization of many verification tasks relies on efficient implementations of decision procedures for fragments of first-order logic. Interactive theorem provers like pvs also make use of such decision procedures to increase the level of automation. Our tool implements decision procedures based on automata-theoretic techniques for first-order logics with linear arithmetic, namely, for FO(ℕ, +), FO(ℤ,+,<), and FO(ℝ, ℤ,+,<).

- Session X: Constraints and Decisions | Pp. 307-310

Three-Valued Abstraction for Continuous-Time Markov Chains

Joost-Pieter Katoen; Daniel Klink; Martin Leucker; Verena Wolf

This paper proposes a novel abstraction technique for continuous-time Markov chains (CTMCs). Our technique fits within the realm of three-valued abstraction methods that have been used successfully for traditional model checking. The key idea is to apply abstraction on uniform CTMCs that are readily obtained from general CTMCs, and to abstract transition probabilities by intervals. It is shown that this provides a conservative abstraction for both and for a three-valued semantics of the branching-time logic CSL (Continuous Stochastic Logic). Experiments on an infinite-state CTMC indicate the feasibility of our abstraction technique.

- Session XI: Probabilistic Verification | Pp. 311-324

Magnifying-Lens Abstraction for Markov Decision Processes

Luca de Alfaro; Pritam Roy

We present a novel abstraction technique which allows the analysis of reachability and safety properties of Markov decision processes with very large state spaces. The technique, called (MLA) copes with the state-explosion problem by partitioning the state-space into regions, and by computing upper and lower bounds for reachability and safety properties on the regions, rather than on the states. To compute these bounds, MLA iterates over the regions, considering the concrete states of each region in turn, as if one were sliding across the abstraction a magnifying lens which allowed viewing the concrete states. The algorithm adaptively refines the regions, using smaller regions where more detail is needed, until the difference between upper and lower bounds is smaller than a specified accuracy. We provide experimental results on three case studies illustrating that MLA can provide accurate answers, with savings in memory requirements.

- Session XI: Probabilistic Verification | Pp. 325-338

Underapproximation for Model-Checking Based on Random Cryptographic Constructions

Arie Matsliah; Ofer Strichman

For two naturals , such that  < , we show how to construct a circuit with inputs and outputs, that has the following property: for some 0 ≤  ≤ , the circuit defines a -universal function. This means, informally, that for every subset of outputs, every possible valuation of the variables in is reachable (we prove that is very close to with an arbitrarily high probability). Now consider a circuit with inputs that we wish to model-check. Connecting the inputs of to the outputs of gives us a new circuit ′ with inputs, that its original inputs have freedom defined by . This is a very attractive feature for underapproximation in model-checking: on one hand the combined circuit has a smaller number of inputs, and on the other hand it is expected to find an error state fast if there is one.

We report initial experimental results with bounded model checking of industrial designs (the method is equally applicable to unbounded model checking and to simulation), which shows mixed results. An interesting observation, however, is that in 13 out of 17 designs, setting to be /5 is sufficient to detect the bug. This is in contrast to other underapproximation that are based on reducing the number of inputs, which in most cases cannot detect the bug even with  = /2.

- Session XI: Probabilistic Verification | Pp. 339-351

Using Counterexamples for Improving the Precision of Reachability Computation with Polyhedra

Chao Wang; Zijiang Yang; Aarti Gupta; Franjo Ivančić

We present an operator to accelerate termination of reachability computation with polyhedra. At the same time, a counterexample guided refinement algorithm is used to iteratively expand the care set to improve the precision of the reachability computation. We also introduce two heuristic algorithms called and to minimize the polyhedral representations without reducing the accuracy. We present some promising experimental results from a preliminary implementation of these techniques.

- Session XII: Abstraction | Pp. 352-365