Catálogo de publicaciones - libros
Emerging Directions in Embedded and Ubiquitous Computing: EUC 2006 Workshops: NCUS, SecUbiq, USN, TRUST, ESO, and MSA, Seoul, Korea, August 1-4, 2006, Proceedings
Xiaobo Zhou ; Oleg Sokolsky ; Lu Yan ; Eun-Sun Jung ; Zili Shao ; Yi Mu ; Dong Chun Lee ; Dae Young Kim ; Young-Sik Jeong ; Cheng-Zhong Xu (eds.)
En conferencia: International Conference on Embedded and Ubiquitous Computing (EUC) . Seoul, South Korea . August 1, 2006 - August 4, 2006
Resumen/Descripción – provisto por la editorial
No disponible.
Palabras clave – provistas por la editorial
User Interfaces and Human Computer Interaction; Computer Communication Networks; Special Purpose and Application-Based Systems; Information Systems Applications (incl. Internet); Data Encryption; Computers and Society
Disponibilidad
Institución detectada | Año de publicación | Navegá | Descargá | Solicitá |
---|---|---|---|---|
No detectada | 2006 | SpringerLink |
Información
Tipo de recurso:
libros
ISBN impreso
978-3-540-36850-2
ISBN electrónico
978-3-540-36851-9
Editor responsable
Springer Nature
País de edición
Reino Unido
Fecha de publicación
2006
Información sobre derechos de publicación
© Springer-Verlag Berlin Heidelberg 2006
Cobertura temática
Tabla de contenidos
doi: 10.1007/11807964_84
A Chinese Mobile Phone Input Method Based on the Dynamic and Self-study Language Model
Qiaoming Zhu; Peifeng Li; Gu Ping; Qian Peide
This paper birefly introduces a Chinese digital input method named as CKCDIM (CKC Digital Input Method) and then applies it to the Symbian OS as an example, and it also proposes a framework of input method which adopted the Client/Server architecture for the handheld computers. To improve the performance of CKCDIM, this paper puts forward a dynamic and self-study language model which based on a general language model and user language model, and proposes two indexes which are the average number of pressed-keys (ANPK) and the hit rate of first characters (HRFC) to measure the performance of the input method. Meanwhile, this paper brings forward a modified Church-Gale smoothing method to reduce the size of general language model to meet the need of mobile phone. At last, the experiments prove that the dynamic and self-study language model is a steady model and can improve the performance of CKCDIM.
- ESO 2006 Workshop | Pp. 836-847
doi: 10.1007/11807964_85
An -Based Watermarking Scheme for Java Programs
Zheng Yuan; Qiaoyan Wen; Wenling Wu; Qing Zhang
In this paper, we propose an identities() based watermarking scheme for Java programs. In our scheme, the watermark is generated by participants’ identities, embedded via the watermarked opaque predicates, and verified using zero-knowledge proof. We also present a construction of a family of opaque predicates by Legendre symbol, which is resilient, cheap, and stealthy. The order of the watermark is encoded and embedded into the watermarked opaque predicates, and the watermarked opaque predicates are treated as threads of a Java program. Thus, the embedded watermark is dynamic and secure against all usual types of watermarks algorithms attacks and watermarks protocols attacks, and also secure against static and dynamic attacks.
- ESO 2006 Workshop | Pp. 848-857
doi: 10.1007/11807964_86
Data-Layout Optimization Using Reuse Distance Distribution
Xiong Fu; Yu Zhang; Yiyun Chen
As the ever-increasing gap between the speed of processor and the speed of memory has become the cause of one of primary bottlenecks of computer systems, modern architecture systems use cache to solve this problem, whose utility heavily depends on program data locality. This paper introduces a platform independent data-layout optimization framework to improve program data locality. This framework uses a variable relation model based on variables’ reuse distance distribution to quantitate the relation of variables and accordingly assigns variables which are often accessed together in one group. At the same time this framework introduces a dynamic array regrouping method to group dynamic arrays assigned in a group. Experiments show that this data-layout optimization framework can effectively improve program data locality and program performance.
- ESO 2006 Workshop | Pp. 858-867
doi: 10.1007/11807964_87
Co-optimization of Performance and Power in a Superscalar Processor Design
Yongxin Zhu; Weng-Fai Wong; Ştefan Andrei
As process technology scales down, power wall starts to hinder improvements in processor performance. Performance optimization has to proceed under a power constraint. The co-optimization requires exploration into a huge design space containing both performance and power factors, whose size is over costly for extensive traditional simulations. This paper describes a unified model covering both performance and power. The model consists of workload parameters, architectural parameters plus corresponding power parameters with a good degree of accuracy compared with physical processors and simulators. We apply the model to the problem of co-optimizing the power and performance. Concrete insights into the tradeoffs of designs for performance and power are obtained in the process of co-optimization.
- ESO 2006 Workshop | Pp. 868-878
doi: 10.1007/11807964_88
FAST: An Efficient Flash Translation Layer for Flash Memory
Sang-Won Lee; Won-Kyoung Choi; Dong-Joo Park
Flash memory is used at high speed as storage of personal information utilities, ubiquitous computing environments, mobile phones, electronic goods, etc. This is because flash memory has the characteristics of low electronic power, non-volatile storage, high performance, physical stability, portability, and so on. However, differently from hard disks, it has a weak point that overwrites on already written block of flash memory is impossible to be done. In order to make it possible, an erase operation on the written block should be performed before the overwrite, which lowers the performance of flash memory highly. In order to solve this problem, the flash memory controller maintains a system software module called the flash translation layer(FTL). In this paper, we propose an enhanced log block buffer FTL scheme, FAST(Fully Associative Sector Translation), which improves the page usability of each log block by fully associating sectors to be written by overwrites to the entire log blocks. We also show that our FAST scheme outperforms the previous log block buffer scheme.
- ESO 2006 Workshop | Pp. 879-887
doi: 10.1007/11807964_89
A Novel Discrete Hopfield Neural Network Approach for Hardware-Software Partitioning of RTOS in the SoC
Bing Guo; Yan Shen; Yue Huang; Zhishu Li
The hardware-software automated partitioning of a RTOS in the SoC (SoC-RTOS partitioning) is a crucial step in the hardware-software co-design of SoC. First, a new model for SoC-RTOS partitioning is introduced in this paper, which can help in understanding the essence of the SoC-RTOS partitioning. Second, a discrete Hopfield neural network approach for implementing the SoC-RTOS partitioning is proposed, where a novel energy function, operating equation and coefficients of the neural network are redefined. Third, simulations are carried out with comparisons to the genetic algorithm and ant algorithm in the performance and search time used. Experimental results demonstrate the feasibility and effectiveness of the proposed method.
- ESO 2006 Workshop | Pp. 888-897
doi: 10.1007/11807964_90
UML Based Evaluation of Reconfigurable Shape Adaptive DCT for Embedded Stream Processing
Xianhui He; Yongxin Zhu; Zhenxin Sun; Yuzhuo Fu
Multimedia stream standards evolve rapidly as stream applications prosper in embedded systems. A key component of standards, discrete cosine transform is being replaced by SA-DCT, whose complexity results in a large design space. The paper describes a UML 2.0 based design approach to quick evaluation of SA-DCT implementations containing both hardware and software, which are hard to describe and verify in C, Verilog and VHDL. Using the approach, we manage to study the partitioning, reconfigurability as well as performance and hardware cost. The design specifications in UML can be translated into SystemC models consisting of simulators and synthesizable code under proper style constraints. The paper demonstrates the feasibility of quick specifications, verification, evaluation and generation of embedded system designs.
- ESO 2006 Workshop | Pp. 898-907
doi: 10.1007/11807964_91
A High Performance Buffering of Java Objects for Java Card Systems with Flash Memory
Min-Sik Jin; Min-Soo Jung
Java Card technology provides a secure, vendor-independent, ubiquitous Java platform for smart cards and other memory constrained devices such as SIM technology. It is also an open standard in SIM and UIM technology for 3G environment. However, the major point of criticism with regard to Java for smart cards and SIM cards is its low execution speed, aside from its memory demands. We found out that the most long-time work during the execution is to write data to non-volatile memory such as Flash memory. In this paper, we make a suggestion to improve the execution speed by buffering effectively Java Card Objects in order to reduce the number of flush() method. With our approach, the total number of flash writing and the execution speed of applications reduced by about 50% and 38% separately.
- ESO 2006 Workshop | Pp. 908-918
doi: 10.1007/11807964_92
Predictive Prefetching of Context-Aware Information in Mobile Networks
In Seon Choi; Gi Hwan Cho
This paper presents a mobility prediction method for context-aware service in mobile networks. It aims to reduce the latency time to get the refreshed information appropriated to the current location of mobile users. The proposed method is to effectively limit the prefetched information into the most next location context. It makes use of the mobile reference count and the residence time that stands for the mobile user’s visiting characteristics in any cell area. Then it also considers the information usability in order to further predict the prefetching candidates. In the numerical results, the proposed method is less latency time than that of the previous schemes to prefetch information matched to user’s current location.
- MSA 2006 Workshop | Pp. 919-927
doi: 10.1007/11807964_93
Digital Ortho-image Production for Web GIS Applications
Hong-Gyoo Sohn; Hyo-Keun Park; Choung-Hwan Park; Joon Heo
This paper presents a true ortho-image generation scheme in urban areas for web GIS application such as urban management system. Proposed scheme includes the solution of conventional problems in normal ortho-image generation. Especially, our approach is focused on the automation and consistency of ortho-image in complex urban areas. For this purpose, we generated additionally plotted DSM (Digital Surface Model), which includes roads, high-level roads, bridges, and tunnels, automatically detected occlusion pixels and restored occlusion areas using a self-developed algorithm, and performed mosaic process using road-based seamlines. Total 2,677 aerial color images were used to create the so called true ortho-image map for Seoul metropolitan city. It turned out that the proposed method could generate true ortho-image map for urban areas with high positional accuracy and good visual consistency. The generated ortho-image database is being successfully operated by Seoul Metropolitan Aerial Photography Management Systems on the web and urban management systems.
- MSA 2006 Workshop | Pp. 928-935