Catálogo de publicaciones - libros
Computer Aided Verification: 17th International Conference, CAV 2005, Edinburgh, Scotland, UK, July 6-10, 2005, Proceedings
Kousha Etessami ; Sriram K. Rajamani (eds.)
En conferencia: 17º International Conference on Computer Aided Verification (CAV) . Edinburgh, United Kingdom . July 6, 2005 - July 10, 2005
Resumen/Descripción – provisto por la editorial
No disponible.
Palabras clave – provistas por la editorial
Logics and Meanings of Programs; Software Engineering; Mathematical Logic and Formal Languages; Artificial Intelligence (incl. Robotics); Logic Design
Disponibilidad
Institución detectada | Año de publicación | Navegá | Descargá | Solicitá |
---|---|---|---|---|
No detectada | 2005 | SpringerLink |
Información
Tipo de recurso:
libros
ISBN impreso
978-3-540-27231-1
ISBN electrónico
978-3-540-31686-2
Editor responsable
Springer Nature
País de edición
Reino Unido
Fecha de publicación
2005
Información sobre derechos de publicación
© Springer-Verlag Berlin Heidelberg 2005
Tabla de contenidos
doi: 10.1007/11513988_21
Compositional Analysis of Floating-Point Linear Numerical Filters
David Monniaux
Digital linear filters are used in a variety of applications (sound treatment, control/command, etc.), implemented in software, in hardware, or a combination thereof. For safety-critical applications, it is necessary to bound all variables and outputs of all filters.
We give a compositional, effective abstraction for digital linear filters expressed as block diagrams, yielding sound, precise bounds for fixed-point or floating-point implementations of the filters.
- Verification of Hardware, Microcode, and Synchronous Systems | Pp. 199-212
doi: 10.1007/11513988_22
Syntax-Driven Reachable State Space Construction of Synchronous Reactive Programs
Eric Vecchié; Robert de Simone
We consider in the current paper the issue of exploiting the structural form of programs [BG92] to partition the algorithmic RSS (reachable state space) fix-point construction used in modelchecking techniques [CGP99]. The basic idea sounds utterly simple, as seen on the case of sequential composition: in P;Q, first compute the states reached in P, and then only carry on to Q, each time using only the relevant local transition relation part. Here a brute-force symbolic breadth-first search would have mixed the exploration of P and Q instead. The introduction of parallel (state product) operators, as well as loop iterators and local synchronizing signals make the problem more difficult (and more interesting). We propose techniques to partition statically (”at compile time”) the program body, so as to obtain a good trade-off between locality and multiplicity of steps.
- Verification of Hardware, Microcode, and Synchronous Systems | Pp. 213-225
doi: 10.1007/11513988_23
Program Repair as a Game
Barbara Jobstmann; Andreas Griesmayer; Roderick Bloem
We present a conservative method to automatically fix faults in a finite state program by considering the repair problem as a game. The game consists of the product of a modified version of the program and an automaton representing the LTL specification. Every winning finite state strategy for the game corresponds to a repair. The opposite does not hold, but we show conditions under which the existence of a winning strategy is guaranteed. A finite state strategy corresponds to a repair that adds variables to the program, which we argue is undesirable. To avoid extra state, we need a memoryless strategy. We show that the problem of finding a memoryless strategy is NP-complete and present a heuristic. We have implemented the approach symbolically and present initial evidence of its usefulness.
- Games and Probabilistic Verification | Pp. 226-238
doi: 10.1007/11513988_24
Improved Probabilistic Models for 802.11 Protocol Verification
Amitabha Roy; K. Gopinath
The IEEE 802.11 protocol is a popular standard for wireless local area networks. Its medium access control layer (MAC) is a carrier sense multiple access with collision avoidance (CSMA/CA) design and includes an exponential backoff mechanism that makes it a possible target for probabilistic model checking. In this work, we identify ways to increase the scope of application of probabilistic model checking to the 802.11 MAC. Current techniques model only specialized cases of minimum size. To work around this problem, we identify properties of the protocol that can be used to simplify the models and make verification feasible. Using these observations, we present generalized probabilistic timed automata models that are independent of the number of stations. We optimize these through a novel abstraction technique while preserving probabilistic reachability measures. We substantiate our claims of a significant reduction due to our optimization with results from using the probabilistic model checker PRISM.
- Games and Probabilistic Verification | Pp. 239-252
doi: 10.1007/11513988_25
Probabilistic Verification for “Black-Box” Systems
Håkan L. S. Younes
We explore the concept of a “black-box” stochastic system, and propose an algorithm for verifying probabilistic properties of such systems based on very weak assumptions regarding system dynamics. Properties are expressed as formulae in a probabilistic temporal logic. Our presentation is a generalization of and an improvement over recent work by Sen et al. on probabilistic verification for “black-box” systems.
- Games and Probabilistic Verification | Pp. 253-265
doi: 10.1007/11513988_26
On Statistical Model Checking of Stochastic Systems
Koushik Sen; Mahesh Viswanathan; Gul Agha
Statistical methods to model check stochastic systems have been, thus far, developed only for a sublogic of continuous stochastic logic (CSL) that does not have steady state operator and unbounded until formulas. In this paper, we present a statistical model checking algorithm that also verifies CSL formulas with unbounded untils. The algorithm is based on Monte Carlo simulation of the model and hypothesis testing of the samples, as opposed to sequential hypothesis testing. We have implemented the algorithm in a tool called VESTA, and found it to be effective in verifying several examples.
- Games and Probabilistic Verification | Pp. 266-280
doi: 10.1007/11513988_27
The AVISPA Tool for the Automated Validation of Internet Security Protocols and Applications
A. Armando; D. Basin; Y. Boichut; Y. Chevalier; L. Compagna; J. Cuellar; P. Hankes Drielsma; P. C. Heám; O. Kouchnarenko; J. Mantovani; S. Mödersheim; D. von Oheimb; M. Rusinowitch; J. Santiago; M. Turuani; L. Viganò; L. Vigneron
AVISPA is a push-button tool for the automated validation of Internet security-sensitive protocols and applications. It provides a modular and expressive formal language for specifying protocols and their security properties, and integrates different back-ends that implement a variety of state-of-the-art automatic analysis techniques. To the best of our knowledge, no other tool exhibits the same level of scope and robustness while enjoying the same performance and scalability.
- Tool Papers II | Pp. 281-285
doi: 10.1007/11513988_28
The Intrusion Detection Tool
Julien Olivain; Jean Goubault-Larrecq
is an intrusion detection tool based on techniques for fast, on-line model-checking. Temporal formulae are taken from a temporal logic tailored to the description of intrusion signatures. They are checked against merged network and system event flows, which together form a linear Kripke structure.
- Tool Papers II | Pp. 286-290
doi: 10.1007/11513988_29
TVOC: A Translation Validator for Optimizing Compilers
Clark Barrett; Yi Fang; Benjamin Goldberg; Ying Hu; Amir Pnueli; Lenore Zuck
We describe a tool called TVOC, that uses the approach to check the validity of compiler optimizations: for a given source program, TVOC proves the equivalence of the source code and the target code produced by running the compiler. There are two phases to the verification process: the first phase verifies loop transformations using the proof rule ; the second phase verifies structure-preserving optimizations using the proof rule . Verification conditions are validated using the automatic theorem prover CVC Lite.
- Tool Papers II | Pp. 291-295
doi: 10.1007/11513988_30
Cogent: Accurate Theorem Proving for Program Verification
Byron Cook; Daniel Kroening; Natasha Sharygina
Many symbolic software verification engines such as and rely on automatic theorem provers. The existing theorem provers, such as , lack precise support for important programming language constructs such as pointers, structures and unions. This paper describes a theorem prover, , that accurately supports all ANSI-C expressions. The prover’s implementation is based on a machine-level interpretation of expressions into propositional logic, and supports finite machine-level variables, bit operations, structures, unions, references, pointers and pointer arithmetic. When used by during the model checking of over 300 benchmarks, ’s improved accuracy reduced the number of timeouts by half, increased the number of true errors found, and decreased the number of false errors.
- Tool Papers II | Pp. 296-300