Catálogo de publicaciones - libros

Wireless Mesh Networks (WMN) with static nodes, consisting of pointto-point links operating at frequencies above 10GHz are studied in this chapter. The dominant fading mechanism deteriorating the performance of these wireless networks is rain attenuation. Due to spatial-temporal properties of rain fading, routing protocols that usually operate well under clear sky conditions seem to be inefficient. In this chapter, a new routing protocol applying evolutionary game theory is presented. Traffic is being controlled if one considers an infinite number of agents that each is responsible for an infinitesimal load. Their aim is to maximize their individual throughput selfishly without considering the performance of the whole network. The routing strategy of every agent is being revised continuously by sampling another path using input from the physical layer. Finally, the performance of the proposed routing scheme is evaluated through extended numerical simulations for its stability and scalability.

This chapter investigates a multiobjective formulation of the United States Navy’s Sailor Assignment Problem (SAP) and examines the performance of two widely-used multiobjective evolutionary algorithms (MOEAs) on large instances of this problem. The performance of the algorithms is examined with respect to both solution quality and diversity, and the algorithms are shown to provide inadequate diversity along the Pareto front. A domain-specific local improvement operator is introduced into the MOEAs, producing significant performance increases over the evolutionary algorithms alone. This hybrid MOEA approach is applied to the sailor assignment problem and shown to provide greater diversity along the Pareto front. The manner in which the local search is incorporated differs somewhat from what is generally reported. Our results suggest that such an approach may be beneficial for practitioners in handling similar types of real-world problems.

In this chapter, a software-based methodology to automatically generate test programs is described. The methodology is based on an evolutionary algorithm able to generate test programs for microprocessor cores, and may be used for different processors since their instruction set architecture is described appropriately, and because a feedback can be defined, computed, and used to drive the test program generation process. The usefulness of the methodology is backed up by the presentation of three different cases of study: the first one tackles the verification of the DLX/pII processor; the second one generates post-silicon verification programs for the Pentium 4; and the third one evolves a test set for the PLASMA processor. The gathered experimental results demonstrate the algorithm versatility and efficiency.