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Formal Modeling and Analysis of Timed Systems: 4th International Conference, FORMATS 2006, Paris, France, September 25-27, 2006, Proceedings

Eugene Asarin ; Patricia Bouyer (eds.)

En conferencia: 4º International Conference on Formal Modeling and Analysis of Timed Systems (FORMATS) . Paris, France . September 25, 2006 - September 27, 2006

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Institución detectada Año de publicación Navegá Descargá Solicitá
No detectada 2006 SpringerLink

Información

Tipo de recurso:

libros

ISBN impreso

978-3-540-45026-9

ISBN electrónico

978-3-540-45031-3

Editor responsable

Springer Nature

País de edición

Reino Unido

Fecha de publicación

Información sobre derechos de publicación

© Springer-Verlag Berlin Heidelberg 2006

Tabla de contenidos

Timed Alternating-Time Temporal Logic

Thomas A. Henzinger; Vinayak S. Prabhu

We add freeze quantifiers to the game logic ATL in order to specify real-time objectives for games played on timed structures. We define the semantics of the resulting logic TATL by restricting the players to physically meaningful strategies, which do not prevent time from diverging. We show that TATL can be model checked over timed automaton games. We also specify timed optimization problems for physically meaningful strategies, and we show that for timed automaton games, the optimal answers can be approximated to within any degree of precision.

Palabras clave: Model Check; Reasonable Strategy; Winning Strategy; Game Time; Game Structure.

- Invited Talks | Pp. 1-17

Concurrent Semantics Without the Notions of State or State Transitions

Edward A. Lee

This paper argues that basing the semantics of concurrent systems on the notions of state and state transitions is neither advisable nor necessary. The tendency to do this is deeply rooted in our notions of computation, but these roots have proved problematic in concurrent software in general, where they have led to such poor programming practice as threads. I review approaches (some of which have been around for some time) to the semantics of concurrent programs that rely on neither state nor state transitions. Specifically, these approaches rely on a broadened notion of computation consisting of interacting components. The semantics of a concurrent compositions of such components generally reduces to a fixed point problem. Two families of fixed point problems have emerged, one based on metric spaces and their generalizations, and the other based on domain theories. The purpose of this paper is to argue for these approaches over those based on transition systems, which require the notion of state.

Palabras clave: Output Port; Partial Function; Input Port; Label Transition System; Concurrent System.

- Invited Talks | Pp. 18-31

Decidability and Expressive Power of Real Time Logics

Alexander Rabinovich

Temporal Logic based on the two modalities “Since” and “Until” ( TL ) is popular among computer scientists as the framework for reasoning about a system evolving in time. This logic is usually referred to as the standard linear time temporal logic. The “linear time“ appears in the name of this logic probably because when it was introduced by Pnueli its intended models were linear orders; more precisely, ω -models. The adjective “standard” is presumable used due to the Kamp theorem which states that it is expressively equivalent (over the ω -models) to first order monadic logic of order – a very fundamental logic.

- Invited Talks | Pp. 32-32

Extended Directed Search for Probabilistic Timed Reachability

Husain Aljazzar; Stefan Leue

Current numerical model checkers for stochastic systems can efficiently analyse stochastic models. However, the fact that they are unable to provide debugging information constrains their practical use. In precursory work we proposed a method to select diagnostic traces, in the parlance of functional model checking commonly referred to as failure traces or counterexamples, for probabilistic timed reachability properties on discrete-time and continuous-time Markov chains. We applied directed explicit-state search algorithms, like Z^ ∗ , to determine a diagnostic trace which carries large amount of probability. In this paper we extend this approach to determining sets of traces that carry large probability mass, since properties of stochastic systems are typically not violated by single traces, but by collections of those. To this end we extend existing heuristics guided search algorithms so that they select sets of traces. The result is provided in the form of a Markov chain. Such diagnostic Markov chains are not just essential tools for diagnostics and debugging but, they also allow the solution of timed reachability probability to be approximated from below. In particular cases, they also provide real counterexamples which can be used to show the violation of the given property. Our algorithms have been implemented in the stochastic model checker PRISM. We illustrate the applicability of our approach using a number of case studies.

Palabras clave: Markov Chain; Model Check; Target State; Heuristic Function; State Transition Graph.

- Contributed Papers | Pp. 33-51

Intersection of Regular Signal-Event (Timed) Languages

Béatrice Bérard; Paul Gastin; Antoine Petit

We propose in this paper a construction for a “well known” result: regular signal-event languages are closed by intersection. In fact, while this result is indeed trivial for languages defined by Alur and Dill’s timed automata (the proof is an immediate extension of the one in the untimed case), it turns out that the construction is much more tricky when considering the most involved model of signal-event automata. While several constructions have been proposed in particular cases, it is the first time, up to our knowledge, that a construction working on finite and infinite signal-event words and taking into account signal stuttering, unobservability of zero-duration τ -signals and Zeno runs is proposed.

Palabras clave: Normal Form; Repeated State; Instantaneous Event; Silent Transition; Clock Constraint.

- Contributed Papers | Pp. 52-66

Refinements and Abstractions of Signal-Event (Timed) Languages

Béatrice Bérard; Paul Gastin; Antoine Petit

In the classical framework of formal languages, a refinement operation is modeled by a substitution and an abstraction by an inverse substitution. These mechanisms have been widely studied, because they describe a change in the specification level, from an abstract view to a more concrete one, or conversely. For timed systems, there is up to now no uniform notion of substitutions. In this paper, we study the timed substitutions in the general framework of signal-event languages, where both signals and events are taken into account. We prove that regular signal-event languages are closed under substitutions and inverse substitutions.

- Contributed Papers | Pp. 67-81

Bridging the Gap Between Timed Automata and Bounded Time Petri Nets

Bernard Berthomieu; Florent Peres; François Vernadat

Several recent papers investigate the relative expressiveness of Timed Automata and Time Petri Nets, two widespread models for realtime systems. It has been shown notably that Timed Automata and Bounded Time Petri Nets are equally expressive in terms of timed language acceptance, but that Timed Automata are strictly more expressive in terms of weak timed bisimilarity. This paper compares Timed Automata with Bounded Time Petri Nets extended with static Priorities, and shows that two large subsets of these models are equally expressive in terms of weak timed bisimilarity.

Palabras clave: Time Petri nets; priorities; Timed Automata; weak timed bisimilarity; real-time systems modeling and verification.

- Contributed Papers | Pp. 82-97

Matching Scenarios with Timing Constraints

Prakash Chandrasekaran; Madhavan Mukund

Networks of communicating finite-state machines equipped with local clocks generate timed MSCs. We consider the problem of checking whether these timed MSCs are “consistent” with those provided in a timed MSC specification. In general, the specification may be both positive and negative. The system should execute all positive scenarios “sensibly”. On the other hand, negative scenarios rule out some behaviours as illegal. This is more complicated than the corresponding problem in the untimed case because even a single timed MSC specification implicitly describes an infinite family of timed scenarios. We outline an approach to solve this problem that can be automated using Uppaal .

- Contributed Papers | Pp. 98-112

Verification of the Generic Architecture of a Memory Circuit Using Parametric Timed Automata

Remy Chevallier; Emmanuelle Encrenaz-Tiphène; Laurent Fribourg; Weiwen Xu

Using a variant of Clariso-Cortadella’s parametric method for verifying asynchronous circuits, we formally derive a set of linear constraints that ensure the correctness of some crucial timing behaviours of the architecture of SPSMALL memory. This allows us to check two different implementations of this architecture.

Palabras clave: Input Signal; Linear Constraint; Output Port; Generic Architecture; Read Operation.

- Contributed Papers | Pp. 113-127

Model Checking Timed Automata with Priorities Using DBM Subtraction

Alexandre David; John Håkansson; Kim G. Larsen; Paul Pettersson

In this paper we describe an extension of timed automata with priorities, and efficient algorithms to compute subtraction on DBMs (difference bounded matrices), needed in symbolic model-checking of timed automata with priorities. The subtraction is one of the few operations on DBMs that result in a non-convex set needing sets of DBMs for representation. Our subtraction algorithms are efficient in the sense that the number of generated DBMs is significantly reduced compared to a naive algorithm. The overhead in time is compensated by the gain from reducing the number of resulting DBMs since this number affects the performance of symbolic model-checking. The uses of the DBM subtraction operation extend beyond timed automata with priorities. It is also useful for allowing guards on transitions with urgent actions, deadlock checking, and timed games.

Palabras clave: Mutual Exclusion; Process Algebra; Priority Order; Symbolic State; Delay Transition.

- Contributed Papers | Pp. 128-142