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Euro-Par 2007 Parallel Processing: 13th International Euro-Par Conference, Rennes ,France , August 28-31, 2007. Proceedings

Anne-Marie Kermarrec ; Luc Bougé ; Thierry Priol (eds.)

En conferencia: 13º European Conference on Parallel Processing (Euro-Par) . Rennes, France . August 28, 2007 - August 31, 2007

Resumen/Descripción – provisto por la editorial

No disponible.

Palabras clave – provistas por la editorial

Computer System Implementation; Computer Systems Organization and Communication Networks; Software Engineering/Programming and Operating Systems; Theory of Computation; Numeric Computing; Database Management

Disponibilidad
Institución detectada Año de publicación Navegá Descargá Solicitá
No detectada 2007 SpringerLink

Información

Tipo de recurso:

libros

ISBN impreso

978-3-540-74465-8

ISBN electrónico

978-3-540-74466-5

Editor responsable

Springer Nature

País de edición

Reino Unido

Fecha de publicación

Información sobre derechos de publicación

© Springer-Verlag Berlin Heidelberg 2007

Tabla de contenidos

Load Balancing on an Interactive Multiplayer Game Server

Daniel Cordeiro; Alfredo Goldman; Dilma da Silva

In this work, we investigate the impact of issues related to performance, parallelization, and scalability of interactive, multiplayer games. Particularly, we study and extend the game QuakeWorld, made publicly available by under GPL license. We have created a new parallelization model for Quake’s distributed simulation and implemented this model in QuakeWorld server. We implemented the model adapting the QuakeWorld server in order to allow a better management of the generated workload. We present in this paper our experimental results on SMP computers.

- Topic 3: Scheduling and Load-Balancing | Pp. 184-194

A Parallelisable Multi-level Banded Diffusion Scheme for Computing Balanced Partitions with Smooth Boundaries

François Pellegrini

Graph partitioning algorithms have yet to be improved, because graph-based local optimization algorithms do not compute smooth and globally-optimal frontiers, while global optimization algorithms are too expensive to be of practical use on large graphs. This paper presents a way to integrate a global optimization, diffusion algorithm in a banded multi-level framework, which dramatically reduces problem size while yielding balanced partitions with smooth boundaries. Since all of these algorithms do parallelize well, high-quality parallel graph partitioners built using these algorithms will have the same quality as state-of-the-art sequential partitioners.

- Topic 3: Scheduling and Load-Balancing | Pp. 195-204

A Framework for Scheduling with Online Availability

Florian Diedrich; Ulrich M. Schwarz

With the increasing popularity of large-scale distributed computing networks,a new aspect has to be considered for scheduling problems: machines may not be available permanently, but may be withdrawn and reappear later.We give several results for completion time based objectives: 1. we show that scheduling independent jobs on identical machines with online failures to minimize the sum of completion times is (8/7 − )-inapproximable, 2. we give a nontrivial sufficient condition on machine failure under which the SRPT (shortest remaining processing time) heuristic yields optimal results for this setting, and 3. we present meta-algorithms that convert approximation algorithms for offline scheduling problems with completion time based objective on identical machines to approximation algorithms for the corresponding preemptive online problem on identical machines with discrete or continuous time. Interestingly, the expected approximation rate becomes worse by a factor that only depends on the probability of unavailability.

- Topic 3: Scheduling and Load-Balancing | Pp. 205-213

Scheduling File Transfers for Data-Intensive Jobs on Heterogeneous Clusters

Gaurav Khanna; Umit Catalyurek; Tahsin Kurc; P. Sadayappan; Joel Saltz

This paper addresses the problem of efficient collective scheduling of file transfers requested by a batch of tasks. Our work targets a heterogeneous collection of storage and compute clusters. The goal is to minimize the overall time to transfer files to their respective destination nodes. Two scheduling schemes are proposed and experimentally evaluated against an existing approach, the Insertion Scheduling. The first is a 0-1 Integer Programming based approach which is based on the idea of time-expanded networks. This scheme achieves the minimum total file transfer time, but has significant scheduling overhead. To address this issue, we propose a maximum weight graph matching based heuristic approach. This scheme is able to perform as well as insertion scheduling and has much lower scheduling overhead. We conclude that the heuristic scheme is a better fit for larger workloads and systems.

- Topic 3: Scheduling and Load-Balancing | Pp. 214-223

Cooperation in Multi-organization Scheduling

Fanny Pascual; Krzysztof Rzadca; Denis Trystram

The distributed nature of the grid results in the problem of scheduling parallel jobs produced by several independent organizations that have partial control over the system. We consider systems composed of identical clusters of processors. We show that it is always possible to produce a collaborative solution that respects participant’s selfish goals, at the same time improving the global performance of the system. We propose algorithms with a guaranteed worst-case performance ratio on the global makespan: a 3-approximation algorithm if the last completed job requires at most /2 processors, and a 4-approximation algorithm in the general case.

- Topic 3: Scheduling and Load-Balancing | Pp. 224-233

Topic 4 High-Performance Architectures and Compilers

Michael O’Boyle; François Bodin; Jose Gonzalez; Lucian Vintan

Parallelism is now a central concern for architecture designers and compiler writers. Instruction-level parallelism and increasingly multi-cores are present in all contemporary processors. Furthermore, we are witnessing a convergence of interests with architects and compiler writers addressing large scale parallel machines, general-purpose platforms and specialised hardware designs such as graphic coprocessors or low-power embedded systems. Modern systems require system software and hardware to be designed in tandem, hence this topic is concerned with architecture design and compilation. Twenty-four papers were submitted to the track of which five were accepted split over two sessions.

- Topic 4: High-Performance Architectures and Compilers | Pp. 235-235

Program Behavior Characterization Through Advanced Kernel Recognition

Manuel Arenaz; Juan Touriño; Ramón Doallo

Understanding program behavior is at the foundation of program optimization. Techniques for automatic recognition of program constructs (from now on, computational kernels) characterize the behavior of program statements, providing compilers with valuable information to to guide code optimization. Our goal is to develop automatic techniques that summarize the behavior of full-scale real applications by building a high-level representation that hides the complexity of implementation details. The first step towards this goal is the description of applications in terms of computational kernels such as induction variables, reductions, and array recurrences. To this end we use XARK, a compiler framework that recognizes a comprehensive collection of frequently used kernels. This paper presents detailed experiments that describe several benchmarks from different application domains in terms of the kernels recognized by XARK. More specifically, the SparsKit-II library for the manipulation of sparse matrices, the Perfect benchmarks, the SPEC CPU2000 collection and the PLTMG package for solving elliptic partial differential equations are characterized in detail.

- Topic 4: High-Performance Architectures and Compilers | Pp. 237-247

Towards Real-Time Compression of Hyperspectral Images Using Virtex-II FPGAs

Antonio Plaza

Hyperspectral imagery is a new type of high-dimensional image data which is now used in many Earth-based and planetary exploration applications. Many efforts have been devoted to designing and developing compression algorithms for hyperspectral imagery. Unfortunately, most available approaches have largely overlooked the impact of mixed pixels and subpixel targets, which can be accurately modeled and uncovered by resorting to the wealth of spectral information provided by hyperspectral image data. In this paper, we develop an FPGA-based data compression technique which relies on the concept of spectral unmixing, one of the most popular approaches to deal with mixed pixels and subpixel targets in hyperspectral analysis. The proposed method uses a two-stage approach in which the purest pixels in the image (endmembers) are first extracted and then used to express mixed pixels as linear combinations of end-members. The result is an intelligent, application-based compression technique which has been implemented and tested on a Xilinx Virtex-II FPGA.

- Topic 4: High-Performance Architectures and Compilers | Pp. 248-257

Optimizing Chip Multiprocessor Work Distribution Using Dynamic Compilation

Jisheng Zhao; Matthew Horsnell; Ian Rogers; Andrew Dinn; Chris Kirkham; Ian Watson

How can sequential applications benefit from the ubiquitous next generation of chip multiprocessors (CMP)? Part of the answer may be a dynamic execution environment that automatically parallelizes programs and adaptively tunes the work distribution. Experiments using the Jamaica CMP show how a runtime environment is capable of parallelizing standard benchmarks and achieving performance improvements over traditional work distributions.

- Topic 4: High-Performance Architectures and Compilers | Pp. 258-267

Compositional Approach Applied to Loop Specialization

Lamia Djoudi; Jean-Thomas Acquaviva; Denis Barthou

An optimizing compiler has a hard time to generate a code which will perform at top speed for an arbitrary data set size. In general, the low level optimization process must take into account parameters such as loop trip count for generating efficient code. The code can be specialized depending upon data set size ranges, at the expense of code expansion and decision tree overhead.

- Topic 4: High-Performance Architectures and Compilers | Pp. 268-279